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AR# 30699

MIG - How can I modify the Virtex-4 DDR2 deep design to support frequencies above 150 MHz?

Description

MIG supports Virtex-4 DDR2 SDRAM deep designs up to 150 MHz. What changes do I need to make to the code or parameters to use faster frequencies?

NOTE: Xilinx only supports deep designs of up to 150 MHz.

Solution

The following steps describe how to convert a 150 MHz design to a 200 MHz in an example design:

1. Change parameter DLL_FREQUENCY_MODE value in INFRASTRUCTURE module from "LOW" to "HIGH".

2. Change the following parameter values in the PARAMETERS file to a 200 MHz design:

  • RCD_COUNT_VALUE
  • RAS_COUNT_VALUE
  • RP_COUNT_VALUE
  • RFC_COUNT_VALUE
  • TRTP_COUNT_VALUE
  • TWTR_COUNT_VALUE

All of these parameters are calculated as:
((Timing_Parameter_Value)/Time_Period in ns) - 1)

Example:
RCD_COUNT_VALUE at 200 MHz for TRCD value of 15 is:

= (TRCD / 5) - 1;
= (15 / 5) - 1
= 2 i.e., 3'b010

3. Change the MAX_REF_CNT. This is calculated as = (7.71 * Frequency) + 1.

At 200 MHz, MAX_REF_CNT value is = (7.71 * 200) + 1 = 1543 i.e., 11'b11000000111.

4. Change the TBY4TAPVALUE. This is calculated as = (Time_Period in ns * 10) / 3.

For 200 MHz, TBY4TAPVALUE value is = (5 * 10) / 3 = 17.

All of the parameter values should be rounded up.

AR# 30699
Date Created 04/10/2008
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 SX
IP
  • MIG