AR #30706 - 10.1 EDK - "ERROR:Xst:1617 - Processing TIMESPEC TS_ASYNC_FIFO_sum_data_0_to_microblaze_0: user TIMEGRP..."

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10.1 EDK - "ERROR:Xst:1617 - Processing TIMESPEC TS_ASYNC_FIFO_sum_data_0_to_microblaze_0: user TIMEGRP..."

AR#	30706
Part	IP-Processor
Last Modified	2008-09-02 00:00:00.0
Status	Active
Keywords	FSL, bus, asynchronous, time, group, MicroBlaze, uBlaze, MB, FIFO, first, in, first, out

Description

Keywords: FSL, bus, asynchronous, time, group, MicroBlaze, uBlaze, MB, FIFO, first, in, first, out

When using the FSL bus on my MicroBlaze system, warnings and errors similar to the following occur:

"WARNING:Xst:2170 - Unit sum_data_0_to_microblaze_0 : the following signal(s) form
a combinatorial loop: sum_data_0_to_microblaze_0/Using_FIFO.Async_FIFO_Gen.Use_Con
trol.Use_DPRAM1.Async_FIFO_I1/Direction_0_or0000.
WARNING:Xst:2170 - Unit microblaze_0_to_ccx2mb_0 : the following signal(s) form
a combinatorial loop: microblaze_0_to_sum_data_0/Using_FIFO.Async_FIFO_Gen.Use_Con
trol.Use_DPRAM1.Async_FIFO_I1/Direction_0_or0000.

Optimizing unit <system> ...
Mapping all equations...
ERROR:Xst:1617 - Processing TIMESPEC TS_ASYNC_FIFO_sum_data_0_to_microblaze_0: use
r TIMEGRP 'sum_data_0_to_microblaze_0_fsl' must be previously defined in FROM/TO c
onstraint.

ERROR:Xst:1489 - Constraint annotation failed."

Solution

A problem was found in one of the FSL's core's supporting files. To work around the problem:

1. Open C:\Xilinx\10.1\EDK\hw\XilinxProcessorIPLib\pcores\fsl_v20_v2_11_a\data\fsl_v20_v2_1_0.tcl in a text editor.

2. Insert the following line between lines 79 and 80:

set use_control [xget_hw_parameter_value $mhsinst "C_USE_CONTROL" ]

3. Modify line 88 (89 after the new line insertion) from:

if { ($async_clks == 1) && ($imp_style == 0) } {

to:

if { ($async_clks == 1) && ($imp_style == 0) && ($use_control == 1) } {

4. Save and close the file.