| AR# | 30711 |
| Part | EDK-compedklib |
| Last Modified | 2008-04-29 00:00:00.0 |
| Status | Active |
| Keywords | pcore, simulate, compedklib, CompXLib, compxlib, simulation ModelSim, VSIM, nic, mpmc, usb |
Keywords: pcore, simulate, compedklib, CompXLib, compxlib, simulation ModelSim, VSIM, nic, mpmc, usb
When I try to simulate my embedded system with a mpmc, xps_most_nic, or xps_usb2_device core, a VSIM error similar to the following occurs:
" ** Error: (vsim-8346) /tools/EDK/project/ip2/processor/hardware/xps_most_nic/xps_most_nic_v1_
00_a/./hdl/src/vhdl/xps_most_nic.vhd(565): VHDL component port was not found because Verilog port 'SPLB_Rst' was
mapped to the extended identifier '\SPLB_Rst\'.
# Loading mpmc_v4_00_a.mpmc_sample_cycle
# ** Error: (vsim-8346) /tools/EDK/hw/XilinxProcessorIPLib/pcores/mpmc_v4_00_a/hdl/vhdl/mpmc_ctrl_if.vhd(499):
# VHDL component port was not found because Verilog port 'MPMC_Clk' was
# mapped to the extended identifier '\MPMC_Clk\'.
# Region: /system/DDR_SDRAM/DDR_SDRAM/mpmc_ctrl_inst/mpmc_ctrl_if_0/mpmc_ctrl_logic_0"