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AR# 3072

M1 LOGIBLOX - How do I LOC or constrain a data register to a range of CLBs?

Description

Keywords: LogiBLOX, LOC, CLB, data register, attribute

Urgency: Standard

General Description:
When attempting to constrain a LogiBLOX-instantiated data
register module into a range of CLBs in a schematic capture
tool, the following constraint format does not work:

LOC=CLB_R1C1:CLB_R10C1

Solution

Instead of constraining the registers by specifying constraints
in the schematic, you must LOC each individual flip-flop via the UCF
file (User Constraints File). The flip-flops inside the
LogiBLOX modules are named FLOP0, FLOP1, FLOP2, and so on,
so if you have a 20-bit data register, you would reference them
as FLOP0 through FLOP19.

For example, if in Foundation, the instance name (as opposed to
the module name) of the LogiBLOX module is L1, then the LOC
constraints can be specified as follows in the UCF, assuming
that L1 is a 20-bit data register:

INST L1/FLOP0 LOC=CLB_R1C1;
INST L1/FLOP1 LOC=CLB_R1C1;
INST L1/FLOP2 LOC=CLB_R2C1;
..
INST L1/FLOP19 LOC=CLB_R10C1;
AR# 3072
Date Created 08/31/2007
Last Updated 02/08/2001
Status Archive
Type ??????