^

AR# 30833 10.1EDK SP1, ppc440mc_ddr2_v1_01_a - Incorrect port width setting in MPD file for 16 bit and 32 bit memory interfaces

For 16-bit and 32-bit memory interface the controller has incorrect port width in MPD

The issue will be fixed in the next release of the EDK 10.1 Sp2. It will be available at:

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp

AR# 30833
Date Created 04/24/2008
Last Updated 12/15/2012
Status Active
Type General Article
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