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AR #30833 - 10.1EDK SP1, ppc440mc_ddr2_v1_01_a - Incorrect port width setting in MPD file for 16 bit and 32 bit memory interfaces

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10.1EDK SP1, ppc440mc_ddr2_v1_01_a - Incorrect port width setting in MPD file for 16 bit and 32 bit memory interfaces

AR# 30833
Part IP-Processor
Last Modified 2008-04-24 00:00:00.0
Status Active
Keywords MPD

Description

Keywords: MPD

For 16-bit and 32-bit memory interface the controller has incorrect port width in MPD

Solution

The issue will be fixed in the next release of the EDK 10.1 Sp2. It will be available at:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
 
 
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