We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 30902

10.1 EDK - I cannot read or write through my external memory controller (xps_mch_emc)


My external memory (SRAM or flash) was working in 9.2i but after doing a revision update in 10.1, my SRAM or my flash is no longer working. What is the problem?


The new external memory controller core version number was improperly revised and as a result the 'revup' process recommended to upgrade to xps_mch_emc_v1_01_a from xps_mch_emc_v1_00_a. The new version of the core requires that a new port be connected. To fix the problem, add the following line in the MHS file in the xps_mch_emc instance:

PORT RdClk = sys_clk_s

Where sys_clk_s is the bus clock. The design will have to be reimplemented for the change to take affect.

AR# 30902
Date Created 05/06/2008
Last Updated 12/15/2012
Status Active
Type General Article