AR #30923 - Virtex-5 - SPI Flash access after configuration and dedicated configuration pins

Search Answers Database


 

Virtex-5 - SPI Flash access after configuration and dedicated configuration pins

AR# 30923
Part Config-SPI
Last Modified 2008-05-15 00:00:00.0
Status Active
Keywords STARTUP_VIRTEX5, Flash, ST, Atmel, UG191, CCLK, D_IN, DIN, user data, custom data

Description

Keywords: STARTUP_VIRTEX5, Flash, ST, Atmel, UG191, CCLK, D_IN, DIN, user data, custom data

How can I access my SPI Flash after configuration for data storage in a Virtex-5 Design?
The D_IN and CCLK are dedicated configuration pins, so what should be used to access custom data of my SPI memory?

Solution

Unlike the Spartan-3E/A/AN/A-DSP devices, CCLK and D_IN for Virtex-5 FPGAs are dedicated configuration pins and cannot be assigned as user IO in a design post configuration. It is possible to use the STARTUP_VIRTEX5 primitive to access the dedicated D_IN and CCLK from User logic post configuration. The USRCCLK0 input of the primitive will drive CCLK externally and the DINSPI output of the primitive will gather all data internally, coming from the Flash.

The STARTUP_VIRTEX5 primitive is documented in the Virtex-5 FPGA Configuration User Guide (UG191) -> Chapter 4: User Primitives -> STARTUP_VIRTEX5, accessible at:

http://www.xilinx.com/support/documentation/virtex-5.htm

Information on instantiating this primitive is in the Virtex-5 Libraries Guide for HDL Designs, accessible at:

http://www.xilinx.com/support/documentation/index.htm -> Design Tools Tab

PROMGen in iMPACT can be used to create the custom MCS file containing configuration and user data. This cam be done with the -data_file switch.
 
 
Jobs Events Webcasts News Investors Feedback Legal Sitemap
©  1994-2008 Xilinx, Inc. All Rights Reserved.