Keywords: MPMC, multi, port, memory, control, clock, DRC, Power, PC, 440, Virtex, 5, FXT
When I select the MPMC as my memory controller, I get the following error during platgen:
"ERROR:MDT - issued from TCL procedure "check_clock_connectivity" line 54
ppc440_0 (ppc440_virtex5) -
The MC clock input (CPMMCCLK) must be connected whenever the PPC440MC bus
interface is connected.
ERROR:MDT - platgen failed with errors!
make: *** [implementation/ppc440_0_wrapper.ngc] Error 2
Done!"