| AR# | 30968 |
| Part | EDK-BSB |
| Last Modified | 2008-06-16 00:00:00.0 |
| Status | Active |
| Keywords | multi, port, memory, control, DDR2, dual, double, data, rate |
Keywords: multi, port, memory, control, DDR2, dual, double, data, rate
When you build a design in Base System Builder targeting a board with 2 DDR2 memories (requiring 2 MPMC cores), BSB will not connect the mpmc_clk0_div2 to the second MPMC.