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AR# 30985

10.1 ChipScope Pro Inserter - "WARNING:Par:288 - The signal <signal_name > has no load. PAR will not attempt to route this signal."


Keywords: U_ila_pro_0/U0/I_NO_D.U_ILA/U_STAT/iSTAT, ICON, Logic Analyzer

When using the ChipScope core inserter flow, warnings similar to those below occur relating to ChipScope ILA nets:

"WARNING:Par:288 - The signal U_ila_pro_0/U0/I_NO_D.U_ILA/U_STAT/iSTAT<11>_wg_lut<7> has no load. PAR will not attempt
to route this signal.
WARNING:PhysDesignRules:367 - The signal <U_ila_pro_0/U0/I_NO_D.U_ILA/U_STAT/iSTAT<11>_wg_lut<7>> is incomplete. The
signal does not drive any load pins in the design."


The problem nets have a NOCLIP (Save Flag) that is preventing the trimming of a loadless LUT. In previous versions of the design tools, the NOCLIP did not preserve both the Driver and Load of the net it was applied to, as well as the net itself. Consequently, the LUT was still trimmed. In 10.1 and later, it is preserved and causes the warnings in PAR and PhysDRC during BitGen.

To work around this issue, set the XIL_MAP_OLD_SAVE environment variable to ensure that the LUT is trimmed.

This issue is resolved in ChipScope Pro 11.1.
AR# 30985
Date 04/25/2009
Status Active
Type General Article
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