| AR# |
31065 |
| Part |
SW-SysGen |
| Last Modified |
2008-06-04 00:00:00.0 |
| Status |
Active |
| Keywords |
SysGen, ISim, 798, warning, 746 |
Description
Keywords: SysGen, ISim, 798, warning, 746
When I simulate my design in System Generator, the following messages occur and simulation stops:
"Warning:HDLCompiler:746 - "N:/K.31/rtf/vhdl/src/ieee/numeric_std.vhd" Line 867. Range is empty (null range)"
"ERROR:Simulator:798 - Unknown signal 1073807366 received"
Solution
These are benign error and warning messages occuring during compilation and simulation of Xilinx IP blocks in System Generator. However, System Generator immediately stops when the error message occurs. For more information on these error messages, see
(Xilinx Answer 31079).
These messages are resolved in 10.1 Service Pack 2 and will no longer halt a System Generator simulation.
If you still get these messages after installing Service Pack 2, you should clear your System Generator simulation cache. To clear your System Generator simulation cache, enter the following at the MATLAB prompt:
>> getenv('appdata')
It returns the root location of the simulation cache. From that directory (typically C:\Documents and Settings\user name\Application Data), there is a Xilinx\sysgen folder.
Delete all files in the sysgen directory, the simulation cache is cleared and these simulation messages are resolved.
