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This Release Notes and Known Issues Answer Record is for the Virtex-5 GTX Aurora 64B/66B Aurora v1.2, released in ISE 10.1 IP Update 2 (IP_10.1.2), and contains the following information:
- General Information
- New Features
- Bug Fixes
- Known Issues
For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide at: http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf
General Information
- Limited testing done on hardware using production (rev 2.1) silicon in loopback mode
- All combination of tiles not tested for multi-lanes
- Simplex feature not supported in this release
- Remember to set pin constraints in the aurora_example.ucf file before using the aurora_example design
New Features
- Support for Multi-lanes
- ISE 10.1 design tools support
- Enhanced Frame Generator and Frame Checker
- Separate license for the core
Bug Fixes
- Updates to GTX attributes
Known Issues
- ES (Engineering Silicon) is no longer supported
- If you choose GREFCLK for clocking, and receive the following error: "ERROR:LIT:440 - CLKIN of GTP_DUAL symbol "xyz" is not driven by an IBUFDS, IBUFGDS or GT", please refer to (Xilinx Answer 25316).
AR# 31085 | |
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Date | 05/22/2014 |
Status | Archive |
Type | General Article |