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AR# 31157

10.1 EDK, MPMC v4.00.a - What are other PMCLR register values? How do I clear the dead and global cycle counters?

Description

What are other PMCLR register values from the MPMC data sheet? How do I clear the dead and global cycle counters?

Solution

The MPMC data sheet v4.02.a and earlier did not contain mappings for all PMCLR clear register bits. The missing entries are: 

 

15, PM_GCC_CLR, w, x, 1 = Clear Global Clock Counter 

16, PM0_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 0 

17, PM1_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 1 

18, PM2_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 2 

19, PM3_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 3 

20, PM4_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 4 

21, PM5_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 5 

22, PM6_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 6 

23, PM7_DCC_CLR, w, x, 1= Clear Dead Cycle Counter Port 7 

 

This issue is fixed in the data sheet of MPMC v4.03.a and later, to be released in EDK 10.1, Service Pack 3.

AR# 31157
Date Created 06/11/2008
Last Updated 05/21/2014
Status Archive
Type General Article