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AR# 31209

Endpoint Block Plus Wrapper v1.8 for PCI Express - FXT-based core uses TXBUFFER Bypass for GTX

Description

v1.8, v1.7.1 Known Issue

The Block Plus Wrapper targeting Virtex-5 FXT devices uses the TXBUFFER bypass on the GTX.

Solution

The v1.8 Block Plus Endpoint Wrapper for PCI Express uses the TX Buffer Bypass mode when targeting the FXT device family. When using TX Buffer Bypass, it is possible that as the part's temperature significantly increases or decreases, the TX phase alignment performed initially might fail, causing link failure or other stability problems.

If this problem occurs, issuing a system reset (asserting the sys_reset_n input to the wrapper) will cause TX phase alignment to initiate again.

This issue is fixed in v1.9, which will be available in 10.1sp3 IP Update 3.

Revision History

09/10/2008 - Updated with fix information.

06/19/2008 - Initial Release.

AR# 31209
Date Created 06/18/2008
Last Updated 12/15/2012
Status Active
Type General Article