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Endpoint Block Plus Wrapper v1.12 for PCI Express - Link transitioning to L0s causes BAR settings to be reset

AR# 31211

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Topic PCIe
Last Updated 08/06/2010
Status Active
Description


Known Issue: v1.12, v1.11, v1.10.1, v1.10, v1.9.4, v1.9.3, v1.9.2, v1.9.1, v1.9, v1.8, v1.7.1, v1.6.1 

 

BAR settings might be lost if link transitions into L0s.

Solution


On most systems, the default setting for Active State Power Management is "off". This issue occurs only if ASPM is in use, or if there is a programmed power management event to move the link to L0s. 

 

For other Endpoint Block Plus Wrapper v1.11 for PCI Express Known Issues and Release Notes, see (Xilinx Answer 32741)

 

Revision History 

09/16/2009- Updated for ISE 11.3 and core version v1.12. 

06/24/2009- Updated for ISE 11.2 and core version v1.11. 

04/13/2009- Updated for ISE 11.1 and core version v1.10. 

09/12/2008 - Updated to reflect v1.9. 

06/18/2008 - Initial Release.
Applies To

IP

  • Endpoint Block Plus Wrapper for PCI Express
 
 
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