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AR# 31227

10.1 EDK - Platgen error: "The connection to port jtgc405tdi0 on JTAGPPC_CNTLR is single-ended"

Description

Keywords: BSB, Base System Builder, Custom, jtgc405tdi0, MDT

When I design a custom board using Base System Builder, Platgen generates the following error:

"Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...
ERROR:MDT - issued from TCL procedure
"::hw_jtagppc_cntlr_v2_01_a::syslevel_drc_proc" line 34
jtagppc_cntlr_0 (jtagppc_cntlr) - The connection to port jtgc405tdi0 on
JTAGPPC_CNTLR is single-ended. Please connect all the JTAG signals for port0
to a PowerPC instance
ERROR:MDT - platgen failed with errors!"

Solution

Base System Builder fails to connect the jtgc405tdi0 port in the JTAGPPC_CNTLR. To work around this problem, connect the signal manually.

This problem has been fixed in the latest 10.1 Service Pack available at:
http://www.xilinx.com/support/download/
The first service pack containing the fix is 10.1 Service Pack 3.
AR# 31227
Date Created 06/19/2008
Last Updated 08/25/2008
Status Active
Type General Article