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AR# 31264

11.1 Timing Analysis Known Issue - I see hold violations when using the Timing Analyzer standalone

Description

Keywords: invalid, values, hold, violation, timing, analysis, stand alone

Timing Analyzer standalone automatically opens when an NCD and PCF are loaded, or when timingan is launched from the command line.

I receive hold violations when using Timing Analyzer standalone and my design is properly constrained. After looking at the math for the hold violation, I see that the equation for slack produces a positive value and this should not be a violation. Is this a valid hold violation?

Example Report excerpt:

--------------------------------------------------------------------------------
Hold Violations: TS_CLKA_TO_CLKB = MAXDELAY FROM TIMEGRP "CLKA" TO TIMEGRP "CLKB" 16 ns DATAPATHONLY;
--------------------------------------------------------------------------------
Hold Violation: 0.486ns (requirement - (clock path skew + uncertainty - data path))
Source: FF_1 (FF)
Destination: FF_2 (FF)
Requirement: 0.000ns
Data Path Delay: 0.486ns (Levels of Logic = 0)
Positive Clock Path Skew: 0.000ns
Source Clock: CLKA rising
Destination Clock: CLKB rising
Clock Uncertainty: 0.000ns

Data Path: FF_1 to FF_2
Delay type Delay(ns) Logical Resource(s)
---------------------------- -------------------
Tcko 0.433 FF_1
net (fanout=1) 0.284 NET_1
Tckdi (-Th) 0.231 FF_2
---------------------------- ---------------------------
Total 0.486ns (0.202ns logic, 0.284ns route)
(41.6% logic, 58.4% route)

Notice that the hold violation (same equation for slack) is positive, suggesting that the design met the constraint.

Solution

An issue has been identified where the timing report tool was flagging some paths as hold violations, even though the math suggested there was no violation. Xilinx is in the process of correcting this problem, and it should be resolved in the next major release of the design tools.

In the meantime, double-check that all reported hold violations are not valid by looking at the slack values. If they are positive, there is no violation. You can also use TRCE and run timing analysis from the command line.

For more information on how to run the timing analysis by means of the command line, please refer to the Command Line User Guide section on TRCE.

AR# 31264
Date Created 07/22/2008
Last Updated 04/15/2009
Status Active
Type General Article