Within certain range selections for Write Depth and Write Width, the number of block RAMs used by a particular configuration exceeds the total number of block RAMs available in the largest Xilinx device. As a result, the following error is displayed in the CORE Generator GUI console and generation of the configuration fails:
"ERROR:ip - build_algo_return: For the configured RAM size, the number of block RAMs used exceeds the maximum number of block RAMs in all available architectures (550)"
For example, the issue occurs in the following situation:
- When Port A write depth is selected to be greater than 1544192 with all the other options set to their default values, the above error occurs in the CORE Generator GUI console and generation of this configuration fails. This occurs because a configuration with write width wider than one and write depth > 1544192 exceeds the block RAM resources on the largest Xilinx part.
Currently, the CORE Generator Block Memory Generator GUI does not restrict you to pick a configuration that will fit the target device that was chosen in the CORE Generator project.
Until this is changed, you must pick the width/depth of your configuration that will fit in their target device by checking the block RAM count estimation in the GUI summary page against the number of block RAMs available in your target device.