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AR# 31399

10.1: Unisims, Simprims- DCM simulation models do not work when the input clock has jitter


The clock output from DCM is irregular when the input clock to the DCM simulation model has jitter. Why?


This is a limitation with the simulation model only. Even though the input clock jitter is within the specification, DCM simulation model will not be able to handle the input clock jitter stimulus when "clkout_phase_shift " is set to Variable.

AR# 31399
Date Created 07/28/2008
Last Updated 12/15/2012
Status Active
Type General Article