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AR# 31422

LogiCORE LTE UL Channel Decoder - Release Notes and Known Issues


This Answer Record contains the Release Notes and Known Issues list for the CORE Generator LogiCORE UL Channel Decoder Core.

The following information is listed for each version of the core:

  • New Features
  • Supported Devices
  • Resolved Issues
  • Known Issues


General LogiCORE LTE UL Channel Decoder Issues

LogiCORE LTE UL Channel Decoder v3.0

Initial Release in ISE Design Suite13.2

New Features

  • ISE 13.2 software support
  • AXI4 compliant interfaces
  • Conformance to 3GPP TS 36.212 v9.3.0 Multiplexing and channel coding specification
  • Support for on or off chip codeword buffering
  • Configuration options for stand-alone CQI and TB Decoder
  • Integrated descrambling
  • Integrated LLR calculation
  • Fully decoupled decoding chains
  • Customer demonstration test bench
  • User guide available for detailed information on core

Supported Devices

  • Zynq-7000*
  • Virtex-7
  • Virtex-7 XT (7vx485t)
  • Virtex-7 -1L
  • Kintex-7
  • Kintex-7 -1L
  • Artix-7*
  • Virtex-6 XC CXT/LXT/SXT/HXT
  • Virtex-6 XQ LXT/SXT
  • Virtex-6 -1L XC LXT/SXT
  • Virtex-6 -1L XQ LXT/SXT
  • Virtex-5 XC LX/LXT/SXT/TXT/FXT
  • Virtex-5 XQ LX/LXT/SXT/FXT

*To access these devices in the ISE Design Suite, contact your Xilinx FAE.

Resolved Issues

Known Issues(ISE)

  • None

Known Issues (Vivado)

  • (Xilinx Answer 53465) 2012.4 Vivado Simulator - Why does my DSP Digital Communications core fail to simulate with error Error: Failed to find design work <Core name>?

LogiCORE LTE UL Channel Decoder v2.0

Initial Release in ISE Design Suite11.2.

New Features

  • ISE 11.2 software support
  • Virtex-6 and Spartan-6 device support
  • Addition of PUCCH Chain
  • Addition of PUSCH ACK Channel
  • Addition of PUSCH RI Channel
  • Addition of PUSCH CQI Channel
  • Addition of PUSCH Channel Interleaver
  • Conforms to 3GPP TS 36.212 v8.5.0 Multiplexing and channel coding specification

Resolved Issues

  • None

Known Issues

LogiCORE LTE UL Channel Decoder v1.0

Initial Release in ISE Design Suite 10.1 IP Update 3.

New Features

Available for Virtex-5, Virtex-4, and Spartan-3A DSPdevices

  • Channel coding for 3GPP TS 36.212 supports UL-SCH
  • Bit-accurate C model provided with core
  • Fully optimized for speed and area
  • Fully synchronous design using a single clock

Resolved issues

  • Why is there a Transport block failure on the MSCHTB port if there are no Code Block NULLs in the Transport size, the Modulation format is QPSK, and data is burst into the SSCHTB interface? See (Xilinx Answer 31916).

Known Issues

  • None

Linked Answer Records

Child Answer Records

AR# 31422
Date 01/02/2013
Status Active
Type Release Notes
  • 3GPP LTE UL Channel Decoder
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