ISE 10.1 - "ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB component"

AR#	31432	Search For Another Answer
Topic	SW-MAP
Last Updated	08/07/2008
Status	Active

Description

Keywords: Partition, IOB, Buffer, RocketIO, MGT, GTP, IBUFDS, REFCLK

I have a design that uses MGTs. When there are no partitions, the design passes through implementation without any errors. However, when I create a partition for the MGT submodule, I receive an error similiar to the following:

"ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB component?

Why am I receiving this error and how do I resolve the issue?

NOTE: This Xilinx Answer is a good match for your case only if your design uses partitions, the signal involved is an MGT clock, and the Pack:1107 error message contains the string "Physical Site Type = IPAD".

"ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB component:
PAD symbol "lm_srio_core_clk/sys_clk" (Pad Signal = sys_clk)
DIFFAMP symbol "lm_srio_core_clk/u_refclk_ibufds/IBUFDS" (Output Signal =srio_ref_clk)
An IO component of type IOB was chosen because the IO contains symbols and/or properties consistent with input, output, or bi-directional usage and contains no other symbols or properties that require a more specific IO component type. Each of the following constraints specifies an illegal physical site for a component of type IOB:
Symbol "lm_srio_core_clk/sys_clk" (LOC=AT4 [Physical Site Type = IPAD])
The component type is determined by the types of logic and the properties and configuration of the logic it contains. Please double check that the types of logic elements and all of their relevant properties and configuration options are compatible with the physical site type of the constraint. Please correct the constraints accordingly."

Solution

Since a partition can be implemented by itself, the tools will treat the borders of the partition as a wall and will not look through the border. In this case, the MGT REFCLK is on one side of this wall and the MGT on the other side. If MAP sees that the differential I/O is driving an MGT clock, it is treated differently, and mapped to a BUFDS and two IPAD components. If MAP does not see the MGT connection, the I/O is mapped to two IOB components instead. In this case, because the use of partitions blocks the MGT visibility, the I/O is incorrectly mapped to IOB components. To work around this issue, instantiate the IBUFDS for REFCLK in the same partition as the MGT. MAP can then relate the I/O as REFCLK signal and is allowed to place them in the appropriate IPAD sites.