A tactical patch has been created to address this issue.
1. Download the patch from:
http://www.xilinx.com/txpatches/pub/swhelp/ise10_updates/lwip_v3_00_a_patch.zip2a. Unzip the patch into the sw_services directory in your peripheral repository and library. For example, if your repository is C:\EDK_Repository and your library is C:\EDK_Repository\library1, you will unzip the patch into C:\EDK_Repository\library1\sw_services. In XPS, set the Project > Project Options > Device and Repository tab > Project Peripheral Repository to reflect your repository, that is, C:\EDK_Repository.
2b. Unzip the patch into your project's sw_services directory.
3. Clean software and re-run LibGen to incorporate the new sw_services.
The downloadable patch has been incorporated into Service Pack 3:
http://www.xilinx.com/support/download/
Furthermore, the C:\Xilinx\10.1\EDK\hw\XilinxProcessorIPLib\pcores\xps_ll_temac_v1_01_b\data\xps_ll_temac_v2_1_0.tcl file will need to be modified to accept this change.
1. Open xps_ll_temac_v2_1_0.tcl in your favorite editor.
2. At around line 148:
From:
if {$phy_type == 4 && $incld_io == 1} {
set portList {TXP TXN RXP RXN}
# RGMII_*_0 should be connected to top level
check_ports_connectivity $mhsinst $portList "_0"
if {$tm_enabled == 1} {
# RGMII_*_1 should be connected to top level
check_ports_connectivity $mhsinst $portList "_1"
}
}
To:
if {$phy_type == 4 && $incld_io == 1} {
set portList {TXP TXN RXP RXN}
# RGMII_*_0 should be connected to top level
check_ports_connectivity $mhsinst $portList "_0"
if {$tm_enabled == 0} {
# RGMII_*_0 should be connected to top level
check_ports_connectivity $mhsinst $portList "_0"
}
if {$tm_enabled == 1} {
# RGMII_*_1 should be connected to top level
check_ports_connectivity $mhsinst $portList "_1"
}
}