When simulating an MPMC design that uses the default Virtex-4 MIG PHY, init_done does not go High. This often occurs when using the simulation testbench provided by MIG with MPMC. How do I resolve this issue?
This issue might be caused by testbench bidirectional delay buffers on DQ signals, which conflict with delay buffers instantiated in the MPMC Virtex-4 PHY code, v4_phy_dq_iob.v and v4_phy_dqs_iob.v.
To work around this issue, consider removing the bidirectional delays from the testbench.
This issue is fixed starting with MPMC v4.03.a, to be released in EDK 10.1, Service Pack 3.