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AR# 31578

MIG v2.3 - DDR2 SDRAM: Simulating with Qimonda models causes "Memory Allocation Failure" error


When running a DDR2 SDRAM simulation with a Qimonda memory model, I find that the simulation fails with a "Memory Allocation Failure" error. 

This error occurs on certain systems based on Swap Memory in Linux and Cache memory in Windows.

This is an issue with the Qimonda memory model.


Qimonda support has recommended the following work-around until the model issue is resolved: 


Original code in memory model: 

`ifdef SPARSE_MEM 

parameter all_bits = bank_bits + `SPARSE_ROW_BITS + `SPARSE_COL_BITS; 


parameter all_bits = bank_bits + addr_bits + colm_bits; 



Replace the above code with: 

`ifdef SPARSE_MEM 

parameter all_bits = bank_bits + `SPARSE_ROW_BITS + `SPARSE_COL_BITS; 


parameter all_bits = bank_bits + 10; 




Original code with SPARSE_MEM option in memory model :  

`define SPARSE_ROW_BITS 3 

`define SPARSE_ROW_MAP {A[2],A[1],A[0]} 

`define SPARSE_COL_BITS 4 

`define SPARSE_COL_MAP {A[3],A[2],A[1],A[0]} 


Replace the above code with the following code: 

`define SPARSE_ROW_BITS 4 

`define SPARSE_ROW_MAP {A[3],A[2],A[1],A[0]} 

`define SPARSE_COL_BITS 6 

`define SPARSE_COL_MAP {A[5],A[4],A[3],A[2],A[1],A[0]}

AR# 31578
Date 12/01/2014
Status Active
Type General Article
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