UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 31586

10.1 EDK, ppc440mc_ddr2 - MCI_ADDR_WIDTH should be 36 not 32 in data sheet

Description

When I run through the example calculations on page 10 of the ppc440mc_ddr2.pdf table 8, my COLADDR_STARTBIT is not correct.  

 

How do I resolve this issue?

Solution

The MCI_ADDR_WIDTH value should be 36 and not 32. Use 36 for the MCI_ADDR_WIDTH. 

 

Correction to the ppc440mc_ddr2.pdf document is scheduled for EDK 11.1.

AR# 31586
Date Created 09/08/2008
Last Updated 05/23/2014
Status Archive
Type General Article