Why does the Accumulator or Multiply Accumulate (MACC) Architecture Wizard select the wrong enables, when only one level of pipelining is selected for the A and B registers?
That is, create an Accumulator using the Xtreme DSP Slice Wizard and leave all options as default; then go to page three of the GUI, which allows you to select the enabling options for the slice. You will see that the pipelining is set to 1 for A and B and in the Use Clock Enable section A2 and B2 are greyed out, but A1 and B1 are usable and selected.
This is a known bug in the XtremeDSP Slice Multiply or Multiply Accumulate (MACC) Architecture Wizard output.
For a list of alternative solutions to using the Architecture Wizard, see (Xilinx Answer 30101).