Description
Keywords: Mapping, design, LUTs, Portability
My design crashes during MAP in the "Mapping design into LUTs..." phase. Is this a known problem?
"Mapping design into LUTs...
FATAL_ERROR:Map:Portability/export/Port_Main.h:143:1.27 - This application has
discovered an exceptional condition from which it cannot recover. Process
will terminate. For technical support on this issue, please open a WebCase
with this project attached at http://www.xilinx.com/support."
Solution
A case has been seen where a Virtex-5 design crashed during this phase.
This problem has been fixed in the latest 10.1 Service Pack available at:
http://www.xilinx.com/support/download/
The first service pack containing the fix is 10.1 Service Pack 3.
NOTE: This Answer Record covers a general problem description. If your specific problem still occurs after installing 10.1 sp3, it is a different problem that should be investigated by opening a WebCase:
http://www.xilinx.com/support/clearexpress/websupport.htm