We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 31771

MIG v2.3 - Virtex-5 DDR2 SDRAM Dual Rank - "ERROR: tRFC maximum violation during No Op" occurs in simulation


The MIG v2.3 DDR2 SDRAM Dual Rank design does not issue an auto-refresh to the CS that is not used during calibration.

The controller only issues an auto-refresh command to the CS that is used during calibration (only the last device is calibrated in the dual-rank design).

Because of this, the DDR2 simulation model issues MAX tRFC violations during calibration for the other chip, as follows:

ERROR: tRFC maximum violation during No Op


These errors can safely be ignored.

There is no loss of data.

This issue is fixed in MIG v2.4.
AR# 31771
Date 10/14/2014
Status Active
Type General Article
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Less
  • MIG
Page Bookmarked