We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 31781

Virtex-5 RocketIO GTP - DRP reads PCS_COM_CFG incorrectly in simulation


In GTP designs that implement dynamic rate changes, using the DRP to dynamically re-write attributes is required. Many cases require that the PCS_COM_CFG be altered. In simulation, this value will not be read out correctly from the DRP port.


Though this attribute will need to be written and verified correctly in hardware implementation, it will not adversely affect the simulation of a rate change. In simulation, incorrect values read from PCS_COM_CFG by means of DRP can safely be ignored.

AR# 31781
Date Created 10/09/2008
Last Updated 12/15/2012
Status Active
Type General Article