This Answer Record lists critical patches available for Xilinx ChipScope 10.1 software. Not all patch issues affect all customers or designs. Please be sure to read each patch issue carefully before installing to minimize interoperability issues, and to ensure you meet the minimum requirements.
NOTE: It is important to note that tactical patches are not tested as thoroughly as service packs, and multiple patches for the same application might conflict. If you have further inquiries on a patch, you can contact Xilinx Technical Support.
(Xilinx Answer 31746) 10.1 ChipScope Pro - When I generate my ATC2 Agilent using the Inserter flow, the pins are locked to incorrect locations
(Xilinx Answer 31857) 10.1 ChipScope Pro - IBERT - Virtex-5 TXT MGT locations are reported incorrectly
(Xilinx Answer 31697) 10.1.03 ChipScope Pro GTP SIOTK - Errors in the middle of eye during IBERT parameter sweep