UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 31828

10.1 EDK, MPMC v4.03.a - Does MPMC support row/bank management?

Description

Does MPMC support row/bank management? 

Are there any plans to support it?

Solution

MPMC does not manage open row and banks. 

There are no plans to add bank/row management to MPMC.

However, newer cores such as the PPC440MC_DDR2 do have open bank/row management. 

 

Suggestions for improving memory performance: 

 

  1. Combine multiple, smaller transactions into a larger one.
    Use of 32 or 64-word bursts will increase memory utilization. 
     
  2. Using the NPI PIM interface directly can help maximize performance, but is specific only to MPMC - no design reuse.
     
  3. If using PLB, align the transactions to 16-word boundaries.
    This prevents multiple internal transactions as all bursts are internally address-aligned.
     
  4. Another possibility is to use PPC440MC_DDR2 with the PPC440 crossbar inside a Virtex-5 FXT part.
    PPC440MC is based on the MIG controller and does support row/bank management.
AR# 31828
Date Created 10/20/2008
Last Updated 03/05/2015
Status Active
Type General Article
IP
  • Memory Interface