When I have an EDK project instantiated in an ISE project, what different implementation options will be used?
The notable differences between EDK and ISE are:
EDK: map -pr b -timing; par -ol high
ISE: map -pr off; par -ol std
To ensure that the EDK cores perform as intended when inside of an ISE design, change the ISE settings to match the EDK settings that are listed above.
NOTE: The -timing switch is on by default for Virtex-5, so there is no need to add this switch when targeting Virtex-5 devices.