The Spartan-3 User Guide shows diagrams of the programmable delay blocks. What is the delay through each part of the delay block?
The programming delay in the Spartan-3 family is similar over all devices; however, there are some differences in the number of taps that are available for the Synchronous and Asynchronous delays. The average taps delay for all devices should be approximately 250pS, there is also a delay associated with the MUXs. These delays are shown in the following two diagrams:
Spartan-3A / 3AN / 3ADSP delay**:
In the above diagrams, you can see the Asynchronous and Synchronous paths; for each there is a red and blue trace. These denote the delay without using the initial Coarse delay (RED) and using the Coarse delay (BLUE). The above diagrams are intended only to show the approximate delays when using the IBUF_DELAY_VALUE and IFD_DELAY_VALUE.
**IMPORTANT NOTE: To obtain accurate numbers for your specific design, it is very important that Timing Analyzer be used, as the delay will vary between device sizes and location. Timing Analyzer has the characterization data required in order to give accurate timing numbers. The diagrams above are generalizations based on expected averages.