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AR# 31922

Virtex/Spartan - There is noise/glitch on an input; however, the FPGA design works correctly

Description

When probing a signal at the FPGA pins, I can see a glitch; however, the design is functioning as expected.

Solution

This can be a common issue when you probe a signal directly at a pin. While this is the closest you can physically get to the receiver, it is not the optimal place to measure the quality of the signal. In order to measure the signal accurately, you should measure at the Die itself, but this is obviously not possible with an FPGA.

In order to observe what is happening inside the package, a simulation can help. The following shows the signal at the package pin and also the signal at the Die. It is possible to see what appears to be a glitch on the pin of the package, but looking at the Die itself there is no glitch and the signal is clean. So while the signal integrity looks like it could cause an issue, the simulation shows that the signal is being transmitted correctly.

Simulation of signal at the FPGA Pin and Die
Simulation of signal at the FPGA Pin and Die

If Hspice is the simulator, it is easy to probe the signal after the package. If HyperLynx is the simulator, please select the "on die" option in the Digital Oscilloscope.

How to probe the signal on die in HyperLynx
How to probe the signal on die in HyperLynx

AR# 31922
Date Created 11/20/2008
Last Updated 02/07/2013
Status Active
Type General Article