AR #32012 - 11.1 ISE - Project Navigator does not honor "translate_off" and "translate_on" when building design hierarchy
11.1 ISE - Project Navigator does not honor "translate_off" and "translate_on" when building design hierarchy
| AR# | 32012 |
| Part | SW-Project Navigator |
| Last Modified | 2009-04-28 00:00:00.0 |
| Status | Active |
| Keywords | Simulation, Synposys, constructs, translate_on, translate_off, synthesis, verilog, VHDL |
Description
Keywords: Simulation, Synposys, constructs, translate_on, translate_off, synthesis, verilog, VHDL
A project source file might contain Synopsys constructs "translate_off" and "translate_on" for HDL constructs intended for simulation, but not synthesis.
Project Navigator seems to be building the hierarchy as though the "translate_off" and "translate_on" constructs are not present.
Solution
In ISE 10.1.03, Synopsys constructs "translate_off" and "translate_on", constructs are parsed by Project Navigator to determine hierarchy for VHDL source types. However, the Project Navigator Verilog parser does not yet support these constructs.XST and other synthesis tools, available through Project Navigator, will correctly honor a Synopsys translate_off and Synopsys translate_on construct and omit design units from consideration.