Follow these general guidelines to migrate your design to the new version of EDK:
1. Make note of the cores that XPS is complaining about when you try to bring your old EDK design into 11.1.
2. Hand edit the project's MHS file to change the version number of the old core to the version number of the new core.
2. Open the old core's MPD file and "diff" it against the new core's MPD file:
<EDK_Old>\hw\XilinxProcessorIPLib\pcores\<old_core>\data\<old_core>.mpd
<EDK_New>\hw\XilinxProcessorIPLib\pcores\<new_core>\data\<new_core>.mpd
3. Notice the changes in the PARAMETERS and the PORTS and make those adjustments in your projects MHS file. You will need to add all of the new ports and make changes to any currently used parameter.
4. Save and close the MHS file.
Following are 9.2i cores that will not migrate to 11.1:
apu_fpu_v2_10_a
apu_fpu_v2_10_b
clock_generator_v1_00_a
hard_temac_v1_00_a
jtagppc_cntlr_v1_00_b
lmb_bram_if_cntlr_v1_00_b
microblaze_v4_00_a
microblaze_v4_00_b
microblaze_v5_00_a
microblaze_v5_00_b
microblaze_v5_00_c
microblaze_v6_00_a
microblaze_v6_00_b
mpmc_v3_00_a
mpmc_v3_00_b
opb_ddr_v1_10_a
opb_hdlc_v1_00_c
opb_hdlc_v2_01_a
opb_mdm_v2_00_a
opb_mdm_v3_00_a
opb_pci_arbiter_v1_00_a
plb_ddr_v1_10_a
plb_ddr_v1_11_a
plb_ddr_v1_12_a
plb_gemac_v1_01_a
plb_rapidio_lvds_v1_00_c
plb_temac_v2_00_a
plbv46_pcie_v1_00_a
xps_central_dma_v1_00_a
xps_ethernetlite_v1_00_a
xps_iic_v1_00_a
xps_mch_emc_v1_00_a
xps_spi_v1_00_a
xps_uart16550_v1_00_a