Main

11.1 EDK - xps_uart16550_v2_00_b - The 'Error in receiver FiFO bit' LSR(24) in the Line Status Register is not working correctly

AR# 32413

Search For Another Answer

Topic EDK-IP-Other
Last Updated 04/21/2009
Status Active
Description

Keywords: xps_uart16550_v2_00_a

If the receiver FIFO is filled with 8 characters out of which 5 characters contain either parity/framing or overrun error, the LSR(24) bit shows an error in the receiver FIFO only when reading the Line Status Register for the first time. The next reads of LSR register do not reflect the error in receiver FIFO.

Solution

This issue has been fixed in the latest release of the xps_uart16550_v2_01_a Core and is available in EDK 11.1.

EDK 11.1 is available at:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp
 
 
/csi/footer.htm