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AR# 32417

11.1 EDK, xps_iic v2.00.a - The specification does not meet the 300 ns hold time from SCL to SDA


As per the Philips IIC bus specification, the IIC Master can have 0 ns data hold time on SDA. However, the IIC slave requires 300 ns data hold time on SDA; this can be achieved by configuring the parameter C_SCL_INERTIAL_DELAY by the required hold time. The data sheet is updated for the use of these parameters in slave and master mode.

For example:
If the PLB bus clock frequency is 100 MHz (10 ns) to have 300 ns data hold time on SDA, the parameter S_SCL_INERTIAL_DELAY needs to be configured for the integer value 30.
Parameter C_SDA_INERTIAL_DELAY needs to be configured for value 0.


This issue has been fixed in the xps_iic_v2_01_a core and is available in EDK 11.1.

EDK 11.1 is available at:
AR# 32417
Date Created 04/09/2009
Last Updated 12/15/2012
Status Active
Type General Article
  • EDK - 10.1 sp2
  • EDK - 10.1
  • EDK - 10.1 sp1
  • EDK - 10.1 sp3
  • XPS IIC Bus Interface