Keywords: MDM, BSCAN, JTAG, xmd, logic, Analyzer, ATC2, ICON, ILA
The following errors occur when I use an EDK design as a submodule in ISE, while debuggind the ISE portion with ChipScope. If you include the ICON core in the EDK portion to automatically hook up the JTAG pins, then synthesis errors out because the NCF is included and it cannot find D_CLK.
"ERROR:Xst:1617 - Processing TIMESPEC TS_U_TO_D: user TIMEGRP 'D_CLK' must be previously defined in FROM/TO constraint."
"ERROR:Xst:1489 - Constraint annotation failed."