We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 32518

11.1 Virtex-5 MAP Known Issues - OSERDES/IODELAY/OBUFDS using IOSTANDARD DIFF_HSTL_II_DCI not mapped correctly


My design ran ok in ISE version 10.1, but now I am seeing unroutable connections involving some of my OSERDES I/O which drive through an IODELAY to an OBUFDS using IOSTANDARD DIFF_HSTL_II_DCI. Is this a known issue?


An 11.1 regression for such a case has been seen on an internal design. A fix is scheduled for ISE version 11.2. If you encounter this problem prior to the release of version 11.2, please open a Webcase and refer to this Answer Record by number.

AR# 32518
Date Created 04/20/2009
Last Updated 12/15/2012
Status Active
Type General Article
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-5QV
  • Less
  • ISE Design Suite - 11.1