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11.1 MAP Known Issues - INFO:Map:91 is unnecessarily alarming

AR# 32519

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Last Updated 09/09/2010
Status Active
Description


I am seeing the following message related to some RLOC constraints in my design. I am not too concerned about the RLOC constraints being ignored, but the message seems to be saying that the entire module is being ignored by MAP. Is this true? 

 

INFO:Map:91 - fp_multiplier symbol 

"apu_fpu_virtex5_0/apu_fpu_virtex5_0/gen_apu_fpu_dp_hi.netlist/fpu_multiplier 

" has an RLOC attribute and will be ignored since it is on a hierarchical 

block not directly recognized by map. This may be caused by an error in the 

Xilinx library expansion for the symbol or by a third-party vendor 

incorrectly expanding the symbol.

Solution

The message is incorrect and will be corrected in ISE 11.2. The actual problem is that a hierarchy block was found to have an RLOC constraint, but no corresponding symbols with RLOC constraints were found within the hierarchy. For that reason, the RLOC constraint on the hierarchy is ignored. The logic within the hierarchy will otherwise be implemented normally.

Applies To

Design Tools

  • ISE Design Suite - 11.1
 
 
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