11.1 Timing - Incorrect Clock Analysis after Inverting My Clock with a BUFIO2 or an INV
Description
Timing analysis is being performed on an incorrect clock edge. My design uses an INV or a BUFIO2 to perform the clock inversion. How can I correct the analysis?
Solution
When using logic such as a LUT (INV) or even a BUFIO2 to invert a clock, the timing engine has no indication that the clock was inverted. The inverting components are viewed as combinatorial logic, not clock-modifying blocks.
To correct this issue, use local inversion or a clock-modifying block to invert the clock. DCM, DLL, PLL, BUFR, PMCD, and MMCM components are considered to be clock-modifying blocks.