We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 32773

11.1 EDK, MPMC v5.00.a - Use of VFBC with MPMC_BASEADDRESS 0x80000000 fails to read and write data


When I use the VFBC of the MPMC memory core, an address range existing at address 0x80000000 or above does not work properly.
How do I resolve this issue?


The only known work-around is to move the VFBC below the 0x80000000. This can be accomplished by modifying either the MPMC_BASEADDR or the VFBC port C_PIM < Port_Num > _BASEADDR (by using C_ALL_PIMS_SHARE_ADDRESSES = '0') to result in a memory range located below 0x80000000.
The VFBC now uses the most significant bit of the C_MPMC_BASEADDR during the address/transfer request. This is fixed starting with MPMC v6.00.a, released in EDK 12.1.
AR# 32773
Date Created 05/26/2009
Last Updated 12/15/2012
Status Active
Type General Article
  • EDK - 10.1 sp2
  • EDK - 10.1
  • EDK - 10.1 sp1
  • More
  • EDK - 10.1 sp3
  • EDK - 11.1
  • EDK - 11.2
  • EDK - 11.3
  • EDK - 11.4
  • EDK - 11.5
  • Less
  • Multi-Port Memory Controller (MPMC)