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AR# 32803

11.2 & 11.1 EDK, xps_mailbox_v1_00_a - Mailbox core fails in timing when 2 PLBv46 buses are running at different clock speeds


There is an error in the TCL code that generates timing constraints for the mailbox. However, it looks like there is a problem with synthesis (XST) causing a timing error.


This issue has been fixed in the latest xps_mailbox, and is available in EDK 11.3. 


EDK 11.3 is available at:  


AR# 32803
Date Created 06/01/2009
Last Updated 05/23/2014
Status Archive
Type General Article