11.x XST - ERROR:HDLCompiler:236 - "<file>.vhd" Line xx: Attribute last_value on multiple bits is not synthesizable
Description
Keywords: XST, Spartan-6, Virtex-6, S6, V6, 11.2 , Parser, HDLCompiler:236
I get the following error in XST when targeting Virtex-6/Spartan-6 devices, but do not have any issues when I target older devices. Why?
ERROR:HDLCompiler:236 - "<file>.vhd" Line xx: Attribute last_value on multiple bits is not synthesizable
Example code:
library ieee;
use ieee.std_logic_1164.all;
entity ex_46_1_0 is
port(in_port : in std_logic_vector(3 downto 0);
out_port: out std_logic_vector(3 downto 0));
end ex_46_1_0;
architecture beh of ex_46_1_0 is
begin
out_port <= in_port'last_value;
end;
Solution
In the above example we use 'last_value predefined attribute is used on a signal assignment. This is not synthesizable construct. The code has to be rewritten without 'last_value.In 11.2 XST introduced a new VHDL/Verilog parser for Virtex-6 and Spartan-6 families. For more information on this change please refer (Xilinx Answer 32927)