UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 32985

11.2 XST - "WARNING:HDLCompiler:871 - ".vhd" Line xx: Using initial value -2147483647 for tmp since it is never assigned"

Description

The following warning occurs in XST when I target Virtex-6 or Spartan-6 devices, but I do not have any issues when targeting older devices. Why?

WARNING:HDLCompiler:871 - "<file>.vhd" Line xx: Using initial value -2147483647 for tmp since it is never assigned

Example Code:

library ieee;

use ieee.std_logic_1164.all;

entity ex_0013 is

port(res: out integer

);

end ex_0013;

architecture bhv of ex_0013 is

signal tmp: integer; -- Note: Warning points here

begin

res <= tmp;

end;

Solution

XST takes into account initial values of VHDL types in the synthesis process. According to VHDL LRM, the initial value of type integer or float is the left-most value.

XST for Virtex-6 and Spartan-6 families follows VHDL LRM rules and takes the left-most value for non-initialized integer or float type, resulting in the warning message in the case of integer type.

In 11.2, XST introduced a new VHDL/Verilog parser for Virtex-6 and Spartan-6 families. For more information on this change, see (Xilinx Answer 32927).

AR# 32985
Date Created 06/23/2009
Last Updated 12/15/2012
Status Active
Type General Article