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Spartan-6 FPGA Clocking - DCM de-skew calculations incorrect

AR# 33016

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Topic Clocking
Last Updated 08/31/2010
Status Active
Description

The Spartan-6 FPGA DCM default de-skew settings are incorrect in ISE 11.2 software.  This issue is fixed in ISE 11.3 and later software.

Solution

In the ISE 11.2 software, the default de-skew setting for the DCM is incorrectly set. The tools default to a setting of "9" for the de-skew value when the actual value should be "0". This will result in added skew to your output clock when compared to your input reference clock.  

To correct the issue, you can manually set the DCM de-skew value to "0". To do this, you must enter the FPGA Editor tool, locate the DCM, change to "Edit Mode", and check the "0" box. 

This issue is fixed in ISE 11.3 and later software.
Applies To

Devices

  • Spartan-6 LX
  • Spartan-6 LXT

Design Tools

  • ISE Design Suite - 11.2

IP

  • Digital Clock Manager (DCM) Module
 
 
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