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Spartan-6 FPGA Clocking - PLL simulation may be incorrect when using CLKOUT0 feedback with ISE 11.2 Design Suite Software

AR# 33017

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Topic Clocking
Last Updated 08/31/2010
Status Active
Description

When using the ISE 11.2 software, the simulation of the PLL CLKOUT0 output may not be correct. This issue is fixed in ISE 11.3 and later software.

Solution

In ISE 11.2 software, the CLKOUT0 output frequency may simulate incorrectly if you are also using CLKOUT0 for feedback. The frequency may be higher or lower than expected, so it cannot be relied upon for timing simulations. 

This issue has been fixed beginning in the ISE 11.3 Design Suite software.
Applies To

Devices

  • Spartan-6 LX
  • Spartan-6 LXT

Design Tools

  • ISE Design Suite - 11.2

IP

  • PLL Module
 
 
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