| AR# |
33031 |
| Part |
SW-XST |
| Last Modified |
2009-06-24 00:00:00.0 |
| Status |
Active |
| Keywords |
Keywords : Virtex-6, Spartan-6, HDLCompiler:852, generic
The following error occurs in XST when I target Virtex-6 or Spartan-6 devices, but I do not have any issues when targeting older devices. Why?
"ex_0010.vhd" Line 5: Unit ex_0010 does not have a generic named my_width |
Description
Keywords : Virtex-6, Spartan-6, HDLCompiler:852, generic
The following error occurs in XST when I target Virtex-6 or Spartan-6 devices, but I do not have any issues when targeting older devices. Why?
"ex_0010.vhd" Line 5: Unit ex_0010 does not have a generic named my_width
Solution
This error occurs when the generic name does not match the generic in code.
For older devices, XST ignores the error message, but starting in Virtex-6 and Spartan-6 devices, this will be flagged as an error.
For example:
The generics (-generics) option allows you to redefine generics (VHDL) or parameters (Verilog) values defined in the top-level design block.
In the following examples, width defines the size of the add operation.
File: ex_0010.vhd
Compilation Library: work
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ex_0010 is -- Note: Error points here
generic (width: integer := 8); port(a,b : in unsigned (width-1 downto 0);
res : out unsigned (width-1 downto 0));
end ex_0010;
architecture beh of ex_0010 is
begin
res <= a + b;
end beh;
Generics (parameters) can be redefined directly in XST Synthesis options of ISE Project Navigator (see Figure 1).

Figure 1.
The error occurs due to the difference in generics name. The name should be corrected to resolve this error.
In 11.2, XST introduced a new VHDL/Verilog parser for Virtex-6 and Spartan-6 families. For more information on this change, see
(Xilinx Answer 32927).