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AR# 33163

11.2 System Generator for DSP - The CE_CLR pin is not available on my generated netlist when I check "Provide clock enable clear pin". Why?


When I generate my design to an HDL or NGC Netlist with the check box "Provide clock enable clear pin" enabled, the resulting files do not include the CE_CLR pin as they did in the past.


This is due to a known issue in 11.1 and 11.2. It is fixed in 11.3.

AR# 33163
Date Created 07/21/2009
Last Updated 12/15/2012
Status Active
Type General Article